Table of Contents
B.Tech 8th Semester Examination, 2022 (Code: 105816)
Question (a): An embedded system is a/an ___ system.
- (i) electronic
- (ii) mechanical
- (iii) electro-mechanical
- (iv) either (i) or (iii)
Correct Answer: (iv) either (i) or (iii)
Question (b): Which general purpose register of the ARM programming model also works as program counter?
- (i) r0
- (ii) r1
- (iii) r10
- (iv) r15
Correct Answer: (iv) r15
Question (c): Which of the following is not the load-store type of ARM instruction?
- (i) LDRH
- (ii) STRB
- (iii) TST
- (iv) ADR
Correct Answer: (iii) TST (TST is a logical Data Processing instruction used for testing bits).
Question (d): Polling is seen in ___ I/O.
- (i) normal
- (ii) busy-wait
- (iii) interrupted
- (iv) None of the above
Correct Answer: (ii) busy-wait
Question (e): Which of the following best supports pipelining?
- (i) RISC
- (ii) CISC
- (iii) Both (i) and (ii)
- (iv) None of the above
Correct Answer: (i) RISC
Question (f): The power consumed in CMOS circuits is ___ to the toggling of inputs.
- (i) directly proportional
- (ii) inversely proportional
- (iii) not related
- (iv) None of the above
Correct Answer: (i) directly proportional
Question (g): ___ is not a RISC architecture.
- (i) ARM
- (ii) MIPS
- (iii) SHARC
- (iv) PowerPC
Correct Answer: (iii) SHARC (SHARC is a Digital Signal Processor (DSP) architecture, whereas the others are classic RISC architectures).
Question (h): Which of the following is not an interfacing component for any embedded system?
- (i) Watchdog timer
- (ii) A/D and D/A converters
- (iii) Memory
- (iv) Testbench
Correct Answer: (iv) Testbench (A testbench is a virtual environment used during simulation and verification, not a physical hardware interfacing component).
Question (i): Which of the following provides absolute addresses to a program?
- (i) Linker
- (ii) Loader
- (iii) Assembler
- (iv) None of the above
Correct Answer: (ii) Loader
Question (j): Which of the following is not a code optimization technique?
- (i) Statement translation
- (ii) Dead code elimination
- (iii) Loop unrolling
- (iv) Expression simplification
Correct Answer: (i) Statement translation
B.Tech 8th Semester Special Exam, 2022 (Code: 105816)
Question (a): What is not correct for the embedded systems?
- (i) They are single functioned or application specific
- (ii) They are more design constrained
- (iii) They require easy testing
- (iv) They are reactive and real-time
Correct Answer: (iii) They require easy testing (Embedded systems are notoriously difficult to test due to hardware dependencies and real-time constraints).
Question (b): The number of clocks per instruction is ___ in Harvard architecture compared to von Neumann architecture.
- (i) less
- (ii) more
- (iii) same
- (iv) None of the above
Correct Answer: (i) less (Because instruction fetches and data accesses can happen simultaneously on separate buses).
Question (c): Which of the following is not the shift/rotate type of ARM instruction?
- (i) ASL
- (ii) RSC
- (iii) ROR
- (iv) RRX
Correct Answer: (ii) RSC (Reverse Subtract with Carry is an arithmetic data processing instruction).
Question (d): Which of the following is not a conditional code in ARM instruction set?
- (i) EQ
- (ii) LS
- (iii) GT
- (iv) GS
Correct Answer: (iv) GS
Question (e): Power failure kind of situations are handled through
- (i) maskable interrupt
- (ii) non-maskable interrupt
- (iii) busy wait
- (iv) None of the above
Correct Answer: (ii) non-maskable interrupt
Question (f): ___ does not affect the power consumption in CMOS circuits.
- (i) Operating voltage change
- (ii) Clock frequency change
- (iii) Toggling of input
- (iv) None of the above
Correct Answer: (iv) None of the above (All three factors—voltage, frequency, and input toggling/switching activity—directly affect CMOS power consumption).
Question (g): Which of the following is/are the measure(s) of performance of an embedded system?
- (i) Response time
- (ii) Throughput
- (iii) Both (i) and (ii)
- (iv) None of the above
Correct Answer: (iii) Both (i) and (ii)
Question (h): Translation of assembly code to machine code is performed by
- (i) assembler
- (ii) compiler
- (iii) loader
- (iv) linker
Correct Answer: (i) assembler
Question (i): Which of the following operations will consume relatively higher energy compared to others?
- (i) 16 bit add
- (ii) 16 bit multiply
- (iii) 8x128x16 SRAM read
- (iv) 8x128x16 SRAM write
Correct Answer: (iv) 8x128x16 SRAM write (Memory write operations consume significantly more energy than reads or basic ALU operations).
Question (j): ARM7 and ARM9 are based on ___ and ___ architectures respectively.
- (i) von Neumann, Harvard
- (ii) von Neumann, von Neumann
- (iii) Harvard, von Neumann
- (iv) Harvard, Harvard
Correct Answer: (i) von Neumann, Harvard (ARM7 utilizes a Von Neumann architecture with a 3-stage pipeline, while ARM9 uses a Harvard architecture with a 5-stage pipeline).
VIIIth Semester Examination – 2023 (Code: 105816)
Question (a): An embedded system is a/an ___ system.
- (i) electronic
- (ii) mechanical
- (iii) electro-mechanical
- (iv) either (i) or (iii)
Correct Answer: (iv) either (i) or (iii)
Question (b): Which of the following is not the load-store type of ARM instruction?
- (i) LDRH
- (ii) STRB
- (iii) TST
- (iv) ADR
Correct Answer: (iii) TST
Question (c): Polling is seen in ___ I/O.
- (i) normal
- (ii) busy-wait
- (iii) interrupted
- (iv) None of the above
Correct Answer: (ii) busy-wait
Question (d): ___ is not a RISC architecture.
- (i) ARM
- (ii) MIPS
- (iii) SHARC
- (iv) Power PC
Correct Answer: (iii) SHARC
Question (e): Stage that reads program data from code memory to instruction buffer queue is known as
- (i) Execution stage
- (ii) Decode stage
- (iii) Address stage
- (iv) Fetch stage
Correct Answer: (iv) Fetch stage
Question (f): Which memory storage is widely used in PCs and Embedded System?
- (i) EEPROM
- (ii) Flash memory
- (iii) SRAM
- (iv) DRAM
Correct Answer: (ii) Flash memory (Note: DRAM is widely used for main memory, but Flash is the universal standard for non-volatile storage/firmware in both domains today).
Question (g): The internal RAM memory of 8051 is
- (i) 32 bytes
- (ii) 128 bytes
- (iii) 64 bytes
- (iv) 256 bytes
Correct Answer: (ii) 128 bytes
Question (h): Which design can be used to reduce the energy consumption of the embedded system?
- (i) Simulator
- (ii) Compiler
- (iii) Emulator
- (iv) Debugger
Correct Answer: (ii) Compiler (Software code optimization by a compiler can heavily reduce execution time and energy consumption).
Question (i): Which of the following is true about the Direct Memory Access (DMA) technique in an embedded system?
- (i) It is used for analog-to-digital conversion.
- (ii) It is used for controlling physical system.
- (iii) It is used for transferring data between memory and peripherals
- (iv) It is used for event-driven system.
Correct Answer: (iii) It is used for transferring data between memory and peripherals
Question (j): Processor must accept and process frame before next frame arrives, typically called
- (i) hard real-time systems.
- (ii) Real-data constraints.
- (iii) Real-time constraints.
- (iv) Soft real-time systems.
Correct Answer: (i) hard real-time systems. (Missing a deadline in this scenario results in a total system failure/data loss, the defining trait of hard real-time).
Special Examination – 2023 (Code: 105816)
(Note: This paper featured short-answer definitions instead of MCQs).
Question (a): Define embedded system.
Answer: An embedded system is a microprocessor- or microcontroller-based system of hardware and software designed to perform a dedicated function, either as an independent system or as a part of a larger mechanical or electrical system.
Question (b): Explain ARM instruction?
Answer: ARM instructions are 32-bit (or 16-bit in Thumb mode) RISC instructions that strictly follow a load-store architecture, meaning data processing operations only take place within CPU registers, not directly in memory.
Question (c): Polling is seen in ___ I/O.
Answer: busy-wait
Question (d): What is the most important in RISC architecture.
Answer: The most important feature is a simplified, highly optimized instruction set that allows the majority of instructions to execute in a single clock cycle, heavily utilizing registers to minimize memory access.
Question (e): Define Execution stage.
Answer: The execution stage is the phase in the CPU instruction pipeline where the decoded instruction is actually carried out (computed) by the Arithmetic Logic Unit (ALU) or execution unit.
Question (f): ___ memory storage is widely used in PCs and Embedded System.
Answer: Flash (or DRAM)
Question (g): The internal RAM memory of 8051 is ___.
Answer: 128 bytes
Question (h): ___ design can be used to reduce the energy consumption of the embedded system.
Answer: Compiler (or Hardware/Software Co-design)
Question (i): Define debugger.
Answer: A debugger is a software tool used to test and find bugs (errors) in target programs, allowing a programmer to pause execution, inspect variables, and step through code instruction by instruction.
Question (j): Define real time constraints.
Answer: Real-time constraints are strict timing deadlines within which a system must respond to inputs or events to ensure correct, safe, and stable operation.
B.Tech. 8th Semester Examination, 2024 (Code: 105816)
Question (a): Which of the following task swapping methods is a better choice in the embedded system design?
- (i) Time slicing technique.
- (ii) Rate monotonic scheduling technique.
- (iii) Cooperative multitasking technique.
- (iv) Preemption technique.
Correct Answer: (ii) Rate monotonic scheduling technique. (RMS is the standard optimal priority-based scheduling algorithm for real-time operating systems).
Question (b): Which of the following statements is TRUE for the Von Neumann architecture?
- (i) Separate bus between program (or code) memory and data memory.
- (ii) Shared bus between program (or code) memory and data memory.
- (iii) External bus for program (or code) memory and data memory.
- (iv) External bus for data memory only.
Correct Answer: (ii) Shared bus between program (or code) memory and data memory.
Question (c): Which of the following microprocessors is/are designed by Zilog, Inc. for use in embedded systems?
- (i) Z80.
- (ii) 80386.
- (iii) 8087.
- (iv) All of the given options.
Correct Answer: (i) Z80.
Question (d): ARM instruction set architecture is divided into ___ classes of instructions.
- (i) Two.
- (ii) Four.
- (iii) Six.
- (iv) Eight.
Correct Answer: (iii) Six. (Data processing, Branch, Load-Store, Coprocessor, Exception generating, and Status register access).
Question (e): What does CPI stand for?
- (i) Complex Program Instruction.
- (ii) Cycles per Instruction.
- (iii) Current Program Instruction.
- (iv) None of the given options.
Correct Answer: (ii) Cycles per Instruction.
Question (f): Which of the following is the biggest challenge in cache memory design?
- (i) Coherency.
- (ii) Memory access.
- (iii) Memory capacity.
- (iv) None of the given options.
Correct Answer: (i) Coherency. (Ensuring the cache data remains synchronized with main memory and other caches).
Question (g): Which memory component(s) of memory hierarchy is/are typically located on embedded board, but outside of master processor?
- (i) Level-2 Cache.
- (ii) Main Memory.
- (iii) Secondary Memory.
- (iv) All of the given options.
Correct Answer: (iv) All of the given options.
Question (h): Is UART (Universal Asynchronous Receiver-Transmitter) an example of a synchronous serial interface?
- (i) TRUE.
- (ii) FALSE.
Correct Answer: (ii) FALSE. (It is asynchronous, lacking a shared clock line).
Question (i): What component(s) on an embedded board interconnect different buses for carrying information from one bus to another?
- (i) CDROM Drive.
- (ii) MMU.
- (iii) Bridge.
- (iv) All of the given options.
Correct Answer: (iii) Bridge.
Question (j): Which of the following options is/are the common method(s) for connecting a peripheral to a processor?
- (i) Software.
- (ii) External interrupts.
- (iii) Internal interrupts.
- (iv) All of the given options.
Correct Answer: (ii) External interrupts. (Used to alert the processor that the peripheral requires attention).
B.Tech 8th Semester Examination, 2024(S) (Code: 105816)
(Note: This special exam also featured short-answer definitions instead of MCQs).
Question (a): What is the startup code?
Answer: Startup code is a small block of assembly language that executes immediately upon reset to initialize the hardware environment, set up the stack pointer, and initialize variables before passing control to the main() function in C.
Question (b): What is an Interrupt?
Answer: An interrupt is a hardware or software signal sent to the processor indicating an event that needs immediate attention, causing the CPU to temporarily halt its current task to execute a specific Interrupt Service Routine (ISR).
Question (c): Illustrate LDA and STA Instructions.
Answer: LDA (Load Accumulator) loads data from a specified memory address into the accumulator register. STA (Store Accumulator) takes the contents currently in the accumulator register and stores it into a specified memory location.
Question (d): What is emulator?
Answer: An emulator is a hardware device or software program that duplicates the functions of one computer system in another, allowing it to execute software or interface with hardware designed for the original target system.
Question (e): What is I2C bus? Write down its main features.
Answer: I2C (Inter-Integrated Circuit) is a synchronous, multi-master, multi-slave serial communication bus. Its main features include requiring only two signal lines (SDA for data, SCL for clock), utilizing a built-in addressing mechanism, and supporting multiple devices on the same bus.
Question (f): Differentiate between assembler and compiler.
Answer: An assembler translates low-level, processor-specific assembly language directly into machine code. A compiler translates high-level, human-readable code (like C or C++) into machine code.
Question (g): What is “Thumb” in ARM processor?
Answer: Thumb is an instruction set extension in ARM processors that provides a compressed 16-bit instruction set. It improves code density and reduces memory requirements while retaining 32-bit performance.
Question (h): What is the need of cache memory?
Answer: Cache memory is needed to bridge the speed gap between a very fast CPU and slower main memory. It temporarily stores frequently accessed instructions and data to significantly reduce average memory access time.
Question (i): Differentiate between RISC and CISC.
Answer: RISC (Reduced Instruction Set Computer) uses simple, single-cycle instructions and relies heavily on registers to manipulate data. CISC (Complex Instruction Set Computer) uses complex, multi-clock instructions that can directly manipulate memory without loading it into registers first.
Question (j): What is “Inline Assembly”?
Answer: Inline assembly is a compiler feature that allows developers to embed low-level assembly language instructions directly within high-level source code (like C/C++), usually utilized for performance optimization or direct hardware access.
B.Tech 8th Semester Examination, 2025 (Code: 105816)
Question (a): Which of the following processors can perform exponential, logarithmic and trigonometric functions?
- (i) 8087
- (ii) 8086
- (iii) 8080
- (iv) 8088
Correct Answer: (i) 8087 (The 8087 is a dedicated math coprocessor designed specifically for complex mathematical operations).
Question (b): How many stack register does an 8087 have?
- (i) 4
- (ii) 8
- (iii) 16
- (iv) 32
Correct Answer: (ii) 8
Question (c): How are negative numbers stored in a coprocessor?
- (i) 1’s complement
- (ii) 2’s complement
- (iii) decimal
- (iv) gray
Correct Answer: (ii) 2’s complement
Question (d): How is memory accessed in RISC architecture?
- (i) load and store instruction
- (ii) opcode instruction
- (iii) memory instruction
- (iv) bus instruction
Correct Answer: (i) load and store instruction
Question (e): Princeton architecture is also known as:
- (i) Harvard architecture
- (ii) Von Neumann architecture
- (iii) RISC
- (iv) CISC
Correct Answer: (ii) Von Neumann architecture
Question (f): What is the use of address bus?
- (i) to provide data to and from the chip
- (ii) to select a specified chip
- (iii) to select a location within the memory chip
- (iv) to select a read/write cycle
Correct Answer: (iii) to select a location within the memory chip
Question (g): Which of the following can affect the long distance communication?
- (i) resistor
- (ii) clock
- (iii) inductor
- (iv) capacitor
Correct Answer: (iv) capacitor (Parasitic capacitance degrades signal integrity and limits speed over long cable distances).
Question (h): What is the use of address bus? (Note: This question was repeated in the original exam paper).
- (i) to provide data to and from the chip
- (ii) to select a specified chip
- (iii) to select a location within the memory chip
- (iv) to select a read/write cycle
Correct Answer: (iii) to select a location within the memory chip
Question (i): Which of the following can transfer multiple bits of data simultaneously?
- (i) serial port
- (ii) sequential port
- (iii) parallel port
- (iv) concurrent unit
Correct Answer: (iii) parallel port
Question (j): Which is the most basic non-volatile memory?
- (i) Flash memory
- (ii) PROM
- (iii) EPROM
- (iv) ROM
Correct Answer: (iv) ROM (Read-Only Memory)